IEC 60424-2 pdf free download
IEC 60424-2 pdf free download.Ferrite cores – Guidelines on the limits of surface irregularities – Part 2: RM-cores.
1 Scope This part of IEC 60424 provides guidelines on the allowable limits of surface irregularities applicable to RM-cores in accordance with the relevant generic specification. This standard should be considered as a sectional specification useful in the negotiations between ferrite core manufacturers and customers about surface irregularities. Normative reference 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. 3 Limits of surface irregularities 3.1 Visual inspection and recommended limits To facilitate quick identification of recommended limits for a given irregularity based on its location, the following subclauses are summarized in Table 1.3.2 Chips and ragged edges 3.2.1 Chips and ragged edges on mating surfaces The areas of the chips located on the mating surfaces (C1， C1′ and C1″ irregularities in Figure 1) shall not exceed the following limits: 一the cumulative area of the chips shall be less than 4 % of the total mating surface; 一the total length of the ragged edges shall be less than 25 % of the perimeter of the relevant surface.3.2.2 Chips and ragged edges on other surfaces The areas of the chips located on the other surfaces shall not exceed the following limits: The allowable chipping areas are doubled as compared to the limits for the mating surface (see Table 2). The rule for the ragged edges is the same as for the mating surface. Chips and ragged edges are not acceptable on the ridge of the clamping recess area.Chips and ragged edges are not acceptable on the inner edges of the wire slot area (see Figure 1). The area and length references for visual inspection are given in Table 3. 3.3 Cracks A single continuous crack which intersects the perimeter of the relevant surface at two points is not acceptable (see S1, S1′ and S1″ irregularities in Figure 2). The limits for cracks at various locations shown in Figure 2 and Figure 3 are given in Table 4.3.4 Flash Figure 5 shows examples of flash location for an RM-core. There shall be no flash extending from the core into the wire slot. 3.5 Pull-outs Figure 5 and Figure 6 show examples of pull-outs location for RM-core. The cumulative area of the pull-outs on the bottom surface or the clamping recess area of the core shall be less than 25 % of the total respective surface area (including wire-way areas for the bottom surface).3.6 Crystallites Figure 7 shows examples of crystallites location for an RM-core. A single area of the crystallites located on any surface shall be less than 2 % of the respective surface area. The cumulative area of the crystallites located on any surface shall be less than 4% of the respective surface area.3.7 Pores Figure 8 shows examples of pores location for an RM-core. The number of pores located on the same surface shall not exceed 2. The total number of the pores located on all surfaces shall not exceed 5. A hole with an area larger than 1 mm2 on any surface is not acceptable.IEC 60424-2 pdf free download.
